We are a small and young team of researchers working on different aspects of VLSI which happens to be one of the most exciting domains of applied Engineering. Designing electronic circuits for some state of the art applications like Neural amplifiers, simulating advanced solar cell structures for highest possible efficiencies, proposing designs of next generation of electronic devices like Tunnel FETs, studying 5G Technologies, designing Low Noise amplifiers for varied applications | This all excites the researchers at VLSI CoE.
We are Young but highly enthusiastic and dedicated to our tasks
We are a small team but our goals and objectives are very holistic and large.
VLSI CoE has full suite access to tools from Cadence and Silvaco. More than having access to tools, we do have the expertise to use these tools to solve any relevant research problem.
Visit different pages of this website to know more about our already accomplished achievements and what we want to do in near future.
If you do have passion that may match ours, we always do have a position for you. We shall figure out a way to involve you for a great research outcome.
The need to integrate the efforts of researchers working with different aspects of VLSI, microelectronics and photovoltaic has been the primary motivation for the creation of VLSI Center of Excellence at Chitkara University. The Centre aims at establishing a state-of-art facility for design of -
The research and education at VLSI CoE are closely associated with industry and several national & foreign academic institutions of repute.
With a strong inclination toward research in the area of semiconductor IC design and device simulation, Chitkara University has invested significantly by procuring a complete set of industry standard Cadence VLSI design tools with as many as 70 licenses in its kitty. VLSI CoE is dedicated to teaching UG & PG level courses and to carry out high-quality research. Some of the research work carried out in VLSI CoE has already been published and presented in prestigious international journals and conferences.
Dr. Rajnish Sharma chaired a session at 4th International Conference on “2021 Devices for Integrated Circuits (DevIC 2021)” organized by IEEE EDS KGEC Students Branch Chapter in association with the Department of ECE, KGEC held in Kalyani Government Engineering College during 19-20 May, 2021 through online mode.
Research paper titled"A Methodical Survey on Present State of Art for Electrostatically-doped Tunnel FETs and its Future Prospects"authored by Preeti Sharma, Jaya Madan, Rahul Pandey and Rajnish Sharma and presented by Preeti Sharma at recently held ICAMSE 2021 conference at Panjab University, Chandigarh from 5th to 6th March, 2021 has been declared as BEST RESEARCH PAPER IN SESSION 16.
Indian researchers improve perovskite-based solar cell structure
S. Juneja and R. Sharma, "Study of techniques to improve performance of patch antennas for 5G applications at millimeter wave (mmW) frequencies," in IOP Conference Series: Materials Science and Engineering, 2021, vol. 1022, no. 1, p. 012033: IOP Publishing.
Sharma, P., Madan, J., Pandey, R. and Sharma, R., (2021). A Methodical Survey on Present State of Art for Electrostatically-Doped Tunnel FETs and its Future Prospects. Materials Today: Proceedings, (In Press).
Pandey, R., Madan, J. and Sharma, R., (2021). Enhanced Charge Extraction in ‘Metal-Perovskite-Metal Back-Contact’ Solar Cell Structure Through Electrostatic Doping: A Numerical Study. IEEE Transactions on Electron Devices, (In press).
Dr Rajnish Sharma participated in ACM India Annual event held on 13th February, 2021 and talked about the complete process followed for selection of Best student Chapter award 2021.
Dr Rajnish Sharma was invited as Guest of Honor during MoU signing ceremony between National Chung Cheng University (CCU), Taiwan and Tech Mahindra Ltd. press conference held on 28th December, 2020. Dr Rajnish shared his experience about ongoing strong Chitkara University - CCU association and also expressed his view point about the future collaborative research between Chitkara University, CCU (Taiwan) and Tech Mahindra Ltd.
Dr. Rajnish Sharma chaired 3 sessions during IEEE India council conference INDICON 2020 conducted by NSUIT, New Delhi from 10th to 13th December, 2020.
The neural amplifier IC chip designed by Dr. Kulbhushan Sharma under supervision of Dr. Rajnish Sharma was released in Chitkara University campus on 28th November, 2020 in the presence of Dr. Madhu Chitkara (Pro Chancellor, Chitkara University), Dr. Archana Mantri (Vice Chancellor, Chitkara University) and Sh. H.S. Jatana (Group Head - Design and Process group, Semi-conductor Laboratory (SCL), India). Fabricated neural amplifier IC chip is useful for diagnosis of various kind of chronic diseases like Parkinson, Spinal cord injuries, Epilepsy and Paralysis etc.
Sharma, P., Madan, J., Pandey, R. and Sharma, R., (2020). RF Analysis of Double-Gate Junctionless Tunnel FET for Wireless Communication Systems: A Non-quasi Static Approach. Journal of Electronic Materials, pp.1-17
Sharma, K., Pathania, A., Pandey, R., Madan, J., and Sharma, R., (2020). MOS based Pseudo-resistors exhibiting Tera Ohms of Incremental Resistance for biomedical applications: Analysis and proof of concept, Integration, the VLSI journal (Accepted)
Research paper titled Design and Simulation of a-Si:H/PbS Colloidal Quantum Dots Monolithic Tandem Solar Cell for 12% Efficiency by Kashyap, S., Pandey, R., Madan, J., & Sharma, R. has been accepted for publication in Physica Status Solidi (a) Applications and Materials Science.
Dr Rahul and Dr Jaya from VLSI CoE conducted 4 days workshop on solar cell simulation using SCAPS-1D. The workshop is concluded today with an overwhelmingly positive response from the attendees. In total, 41 participants were registered for this workshop. The number includes 6 participants from Chitkara University, and the rest (35) of them were from institutes like IITs, NITs and other Central Universities.
Dr. Kulbhushan Sharma has completed his Ph.D. from Chitkara University, Punjab, India in Electronics and Communication Engineering (ECE) under the supervision of Dr. Rajnish Sharma. The topic of Ph.D. thesis is “Design of neural amplifier with low power and low noise using non-conventional techniques."
Research paper titled Device simulations: Toward the design of >13% efficient PbS colloidal quantum dot solar cell authored by Pandey, R. Khanna, A. Singh, K., Patel, S.K., Singh, H., Madan, J. has been published in journal Solar Energy | DOI - DOI: 10.1016/j.solener.2020.06.099