Dr. Rahul Pandey
Assistant Professor

rahul.pandey@chitkara.edu.in

Expert Areas : PERC Solar Cell, Tandem Solar Cell, Tunnel FET, Perovskite Solar Cells

Dr. Rahul Pandey is currently an Assistant Professor (Research) and associated with VLSI Centre of Excellenceat CURIN department of Chitkara University. He received his doctorate (Ph.D.) in design and simulations of solar cells, while associated with the Microelectronics Research Laboratory, Department of Applied Physics, Delhi Technological University, New Delhi, India. During Ph.D. research work, he published eight (08) papers in the peer-reviewed scientific international journal and 12 articles in international and 01 in national conferences. During Ph.D. work novel architectures have been designed for next-generation photovoltaics.

He has been awarded junior and a senior research fellowship from University Grant Commission (UGC) Government of India. He has also one DST sponsored project (Rs. 24.5 Lacs) to his credit for the development of PERC solar cell through device simulations. He has been awarded international travel support from the DST, Delhi Technological University and CSIR, India for presenting part of his research work in USA and Portugal.

He is an active reviewer of Journal of Photonics for Energy (SPIE), Physica Status Solidi (a), Wiley and Electron Device Letter, IEEE.He received research excellence and incentive awards from Chitkara University, Punjab and from Delhi Technological University, Delhi, India. His research area covers the design and simulation of solar cells, semiconductor physics, thin films and nanotechnology, electronic engineering, solar energy materials, photodetectors, silicon,and perovskite solar cells. He is a member of International Solar Energy Society (ISES), Wiesentalstr. 50, 79115 Freiburg, Germany. Institute of Electrical and Electronics Engineers (IEEE) and Solar Energy Society of India (SESI).

  • Research
  • Teaching
  • Awards
  • Education
  • Service

RESEARCHER IDs

Field of Specializations

  • Silicon-based high-efficiency solar cells such as PERC, HIT and TOPCon.
  • POLO contact for high-efficiency silicon solar cell
  • Front surface design to increase the optical coupling in the active region of the solar cell.
  • Surface passivation of the solar cell.
  • Perovskite solar cell.
  • Electron and hole transport layers.
  • Tunnel FET and FinFET.
  • Expertise in SILVACO TCAD Omni and Victory Bundle, SCAPS-1D, AFORS-HET, AMPS-1D semiconductor device simulators.

ONGOING PROJECT

  1. Development of Fabrication Feasible PERC Solar Cells for More Than 23% Conversion Efficiencies Using the Process and Device Simulations. 24.3 Lacs, funded by DST-SERB under Start-up Research Grant. Sanctioned on 26/11/2019.

SCHOLARLY PUBLICATIONS

*Corresponding author

Paper published in Journals and conferences:

  • Total Publications: 39
  • 17               Papers in International Refereed Journals
  • 21               Papers in International Conferences
  • 01               National Conference

 

Journal publication: 17 published

 2020

  1. Jaya Madan, Rahul Pandey*, Rajnish Sharma and Rishu Chaujar, “Investigation of electrical/analog performance and reliability of gate metal and source pocket engineered DG-TFET”Microsystem Technologies, Springer, DOI: https://doi.org/10.1007/s00542-020-04845-2, April 2020.Visit: https://link.springer.com/article/10.1007/s00542-020-04845-2
  2. Preeti Sharma, Kulbhushan Sharma, H.S Jatana, Jaya Madan, Rahul Pandey* and Rajnish Sharma, “A 1.1 µW biopotential amplifier based on bulk-driven quasi-floating gate technique with extremely low-value of offset voltage”Analog Integrated Circuits and Signal Processing, Springer, DOI: https://doi.org/10.1007/s10470-020-01623-y, April 2020. Visit: https://link.springer.com/article/10.1007%2Fs10470-020-01623-y
  3. Jaya Madan, Minaxi Dassi, Rahul Pandey*, Rishu Chaujar and Rajnish Sharma, “Numerical analysis of Mg2Si/Si heterojunction DG-TFET for low power/high performance applications: Impact of non- idealities” Superlattices and Microstructures, Elsevier, 139, p. 106397, 2020.Visit: https://www.sciencedirect.com/science/article/pii/S0749603619318774
  4. Jaya Madan, Rahul Pandey* and Rishu Chaujar, “Conducting Polymer based Gas Sensor using PNIN- Gate All Around – Tunnel FET” Silicon, Springer, p. 1-9, 2020. IN PRESS. Visit: https://link.springer.com/article/10.1007/s12633-020-00394-5
  5. Jaya Madan, Shivani, Rahul Pandey* and Rajnish Sharma, “Device simulation of 17.3% efficient lead-free all-perovskite tandem solar cell” Solar Energy, Elsevier, 197, p. 212-221, 2020.Visit: https://www.sciencedirect.com/science/article/abs/pii/S0038092X20300062
  6. Jaya Madan, Sparsh Garg, Kartavya Gupta, Shivam Rana, Aanchal Manocha and Rahul Pandey* and Rajnish Sharma, “Numerical simulation of charge transport layer free perovskite solar cell using metal work function shifted contacts” Optik, Elsevier, 202, p. 163646, 2020.Visit: https://www.sciencedirect.com/science/article/abs/pii/S003040261931544X

2019

  1. Jaya Madan, Rahul Pandey*, Rajnish Sharma and Rishu Chaujar,“Impact of metal silicide source electrode on polarity gate induced source in junctionless TFET” Applied Physics A. 2019;125(9):600.Visit: https://link.springer.com/article/10.1007/s00339-019-2900-6
  2. Rahul Pandey, Anu Singla, Jaya Madan, Rajnish Sharma and Rishu Chaujar, “Toward the design of monolithic 23.1% efficient hysteresis and moisture free perovskite/c-Si HJ tandem solar cell: A numerical simulation study” Journal of Micromechanics and Microengineering, IOP, 29, p. 064001,2019.Visit: https://iopscience.iop.org/article/10.1088/1361-6439/ab1512
  3. Rahul Pandey, Anand Prakash Saini and Rishu Chaujar, “Numerical Simulations: Toward the Design of 18.6% Efficient and Stable Perovskite Solar Cell Using Reduced Cerium Oxide Based ETL” Vacuum, 159, pp. 173-181, 2019. Visit: https://www.sciencedirect.com/science/article/abs/pii/S0042207X17318699

2018

  1. Rahul Pandey andRishu Chaujar, “Rear contact silicon solar cells with a-SiCX:H based front surface passivation for near-ultraviolet radiation stability,”Superlattices and Microstructures, 122, pp. 111-123, 2018.Visit: https://www.sciencedirect.com/science/article/abs/pii/S0749603618310413

2017

  1. Rahul Pandey and Rishu Chaujar, “Numerical simulations of novel SiGe-based IBC-HJ solar cell for standalone and mechanically stacked tandem applications,” Materials Research Bulletin, 93, pp. 282-289, 2017.Visit: https://www.sciencedirect.com/science/article/pii/S0025540817307523
  2. Rahul Pandey and Rishu Chaujar, “Technology computer aideddesign of 29.5% efficient perovskite/interdigitated back contact silicon heterojunction mechanically stacked tandem solar cell for energy-efficient applications,” Journal of Photonics for Energy, 7, pp. 022503-022503, 2017.Visit: https://doi.org/10.1117/1.JPE.7.022503

2016

  1. Rahul Pandey and Rishu Chaujar, “Rear contact SiGe solar cell with SiC passivated front surface for> 90-percent external quantum efficiency and improved power conversion efficiency,” Solar Energy, 135, pp. 242-252, 2016. Visit: https://www.sciencedirect.com/science/article/abs/pii/S0038092X16301748
  2. Rahul Pandey and Rishu Chaujar, “Numerical simulations: Toward the design of 27.6% efficient four-terminal semi-transparent perovskite/SiC passivated rear contact silicon tandem solar cell,” Superlattices and Microstructures, 100, pp. 656-666, 2016.Visit: https://www.sciencedirect.com/science/article/abs/pii/S0749603616311648
  3. Rahul Pandey and Rishu Chaujar, “Numerical simulation of rear contact silicon solar cell with a novel front surface design for the suppression of interface recombination and improved absorption,” Current Applied Physics, 16, pp. 1581-1587, 2016. Visit: https://www.sciencedirect.com/science/article/pii/S1567173916302395
  4. Rahul Pandey and Rishu Chaujar, “Novel back-contact back-junction SiGe (BC-BJ SiGe) solar cell for improved power conversion efficiency,” Microsystem Technologies, 22, pp. 2673-2680, 2016. Visit: https://link.springer.com/article/10.1007/s00542-015-2552-1
  5. Rahul Pandey and Rishu Chaujar, “Front surface passivation scheme for back-contact back-junction (BC-BJ) silicon solar cell,” Advanced Science Letters, 22, pp. 815-820, 2016.(I. F= 1.253@2010). Visit: https://www.ingentaconnect.com/contentone/asp/asl/2016/00000022/00000004/art00017

 

Conference Publications

International (21)

 2020

  1. Minaxi Dassi, Jaya Madan, Rahul Pandey* and R. Sharma, “Effect of temperature on analog performance of Mg2Si source heterojunction double gate tunnel field effect transistor”, International Conference on Aspects of Materials Science and Engineering (ICAMSE 2020), 29-30th May, 2020, Panjab University, Chandigarh, India. (Accepted).

2019

  1. Jaya Madan, Rahul Pandey*, Rajnish Sharma, Skanda Shekhar and Rishu Chaujar, “Built-in reliability investigation of gate-drain underlapped PNIN-GAA-TFET for improved linearity and reduced intermodulation distortion” 6th International Conference on ‘Microelectronics, Circuits and Systems’, Micro2019, 06-07thJuly, 2019, Amity University, Kolkata, India.
  2. Rahul Pandey, Jaya Madan, Rajnish Sharma and Rishu Chaujar “Numerical Simulations to Understand the Role of DIO Additive in PTB7:PC71BM Solar Cell” 46th IEEE PVSC, 16th -21st June 2019, Chicago, IL, USA.https://ieeexplore.ieee.org/abstract/document/8980682
  3. Shivani, Jaya Madan, Rahul Pandey and Rajnish Sharma “Designing of CZTSSe Based SnS Thin Film Solar Cell for Improved Conversion Efficiency: A Simulation Study with SCAPS ” 46th IEEE PVSC, 16th -21st June 2019, Chicago, IL, USA. https://ieeexplore.ieee.org/abstract/document/8980459
  4. Anisha Pathania, Rahul Pandey, Jaya Madan and Rajnish Sharma “Design and Simulation of Novel Perovskite/Mg2Si Based Monolithic Tandem Solar Cell With 25.5% Conversion Efficiency” 46th IEEE PVSC, 16th -21st June 2019, Chicago, IL, USA. https://ieeexplore.ieee.org/document/8980777

2018

  1. Rupinder Kaur, Jaya Madan, Rajnish Sharma, Rahul Pandey and Rishu Chaujar “Capacitive Analysis of Hetero Material Gate PNIN-DG-TFET over Diverge Temperature Range for Superior RF/Microwave PerformanceIEEE EDKCON 2018, 24th -25th Nov. 2018, Kolkata, India. https://ieeexplore.ieee.org/document/8770491?denied=
  2. Anu Singla, Rahul Pandey, Rajnish Sharma, Jaya Madan, Kanwardeep Singh, Vinod Kumar Yadav and Rishu Chaujar “Numerical Simulation of CeOx ETL based Perovskite Solar Cell: – An optimization study for high efficiency and stability” IEEE EDKCON 2018, 24th -25th Nov. 2018, Kolkata, India. https://ieeexplore.ieee.org/document/8770401
  3. Jaya Madan, Sandeep Sachdeva, Rupinder Kaur, Rajnish Sharma, Rahul Pandey and Rishu Chaujar “Electrical Characteristics Assessment of Gate Metal and Source Pocket Engineered DG-TFET for low Power Analog Applications” IEEE EDKCON 2018, 24th -25th Nov. 2018, Kolkata, India. https://ieeexplore.ieee.org/document/8770462
  4. Navneet Arora, Rahul Pandey, Rajnish Sharma, Jaya Madan and Rishu Chaujar “Parametric Variation of ZnSe/TiO2 Electron Transport Layer Based Perovskite Solar Cell: A Simulation Study and Optimization” IEEE EDKCON 2018, 24th -25th Nov. 2018, Kolkata, India.https://ieeexplore.ieee.org/document/8770451?denied=
  5. Jaya Madan, Henika Arora, Rahul Pandey and Rishu Chaujar “Analysis of Varied Dielectrics as Surface Passivation on AlGaN/GaN HEMT for Analog Applications” IEEE WECON 2018, 16th – 17th Nov. 2018, Punjab, India. https://ieeexplore.ieee.org/document/8782074
  6. Shivam Gupta, Rahul Pandey, Trijul Khatri and Rishu Chaujar, “A moisture stable, hysteresis-free semi-transparent perovskite solar cell with single wall carbon nanotubes” 7th IEEE World Conference on Photovoltaic Energy Conversion (WCPEC-7), June 10-15, 2018, Waikoloa Hawaii. https://ieeexplore.ieee.org/document/8547616
  7. Jaya Madan, Rahul Pandey and Rishu Chaujar, “Gate Drain Underlapping: A Performance Enhancer For HD-GAA-TFET,” Materials Today: Proceedings, Elsevier, 5(9), pp17453-17463, 2018. (SNIP=0.694). Visit: https://www.sciencedirect.com/science/article/pii/S2214785318311593

2017

  1. Rahul Pandey, Anand Prakash Saini, and Rishu Chaujar, “Numerical simulation of Reduced Cerium Oxide with polaron transport mobility based ETL for stable and efficient Perovskite Solar Cells,” presented at the 17th International Conference on Thin Films, CSIR- National Physical Laboratory, New Delhi, India, 2017.
  2. Rahul Pandey and Rishu Chaujar, “Rear Contact Silicon Solar Cell with SiC Based Front Surface Passivation for Ultraviolet Radiation Stability” presented at the9th International Conference on Advanced Nanomaterials, University of Aveiro, Portugal 19-21st July 2017.
  3. Rahul Pandey, Shivam Gupta, Trijjul Khatri, and Rishu Chaujar, “Interdigitated Back Contact Silicon Solar Cell with Perovskite layer for Front Surface Passivation and Ultraviolet Radiation Stability,” presented at the 44th IEEE PVSC, Washington, DC, USA, 2017.https://ieeexplore.ieee.org/document/8366313.

2016

  1. Rahul Pandey, Apurva Jain, Ajay Kumar, and Rishu Chaujar “Impact of Minority Carrier Lifetime and Temperature on SiC Based Rear Contact SiGe Solar Cell for Concentrator Photovoltaic (CPV) Applications,” in 32nd European Photovoltaic Solar Energy Conference and Exhibition, 2016, pp. 270-273.https://www.eupvsec-proceedings.com/proceedings?paper=39327.
  2. Rahul Pandey, Apurva Jain, and Rishu Chaujar, “Novel 4-terminal perovskite/SiC-based rear contact silicon tandem solar cell with 27.6% PCE,” in Photovoltaic Specialists Conference (PVSC), 2016 IEEE 43rd, 2016, pp. 0812-0815.https://ieeexplore.ieee.org/document/7749718

2015

  1. Rahul Pandey and Rishu Chaujar, “Rear contact solar cell with ZrO2 nano structured front surface for efficient light trapping and enhanced surface passivation,” in Photovoltaic Specialist Conference (PVSC), 2015 IEEE 42nd, 2015, pp. 1-5.https://ieeexplore.ieee.org/document/7356322?denied=
  2. Rahul Pandey and Rishu Chaujar, “Novel SiC encapsulated coaxial silicon nanowire solar cell for optimal photovoltaic performance,” in Photovoltaic Specialist Conference (PVSC), 2015 IEEE 42nd, 2015, pp. 1-5.https://ieeexplore.ieee.org/abstract/document/7355933
  3. Rahul Pandey and Rishu Chaujar, “TCAD Analysis of Silicon-Germanium (SiGe) based Back-Contact Back-Junction (BC-BJ) solar cell as an alternative for silicon based cells,” in TechConnectWorld Innov. Conf. Expo (June 14-17, 2015), 2015, pp. 199-202.https://briefs.techconnect.org/wp-content/volumes/TCB2015v2/pdf/481.pdf

2014

  1. Rahul Pandey and Rishu Chaujar “TCAD Analysis of novel back-contact-back junction SiGe (BC-BJ SiGe) solar cell for improved optical and electrical characteristics,” 1st International Conference on Microelectronics, CircuitsAnd System, July 11th -13th, Kolkata, India 2014. Vol. (1) pp. 127-129. ISBN: 8185824-46-0.

 

National (1)

  1. Rahul Pandey, Rishu Chaujar: SiC Encapsulation Based Coaxial Silicon Nanowire Solar Cell forConcentrated Photovoltaic Applications. Second National Conference on Recent Developments in Electronics (NCRDE-2017), Department of Electronic Science, University of Delhi South Campus, New Delhi, India. February 17-18, 2017, pp. 84-87.

 

Other Research realted activities

  1. Member of publication committee of 6th International Conference on Wireless Networks & Embedded Systems WECON 2018 held at Chitkara University during 16th -17th Nov, 2018, Punjab, India.
  2. Served as a Resource person in STEAM School, and shared expertise in the workshop for 10 days on solar cell device simulation during January-April 2019, organized by Chitkara university research and innovation network (CURIN), Chitkara university, Punjab.
  3. Member of DRC committee at Chitkara University, Punjab.

 

OVERSEAS CONFERENCE PRESENTATIONS

Presented international conference papers in the USA and Portugal.

 

REVIEWER

Active reviewer ofIEEE Electron Device Letters,IET Nano &Micro Letters, Current Nanoscience,Physica Status Solidi (a)and Journal of Photonics for Energy (SPIE) an international refereed Sci. and Scopus indexed journal.

Field of Specializations

Semiconductor Physics, Solid State Devices, Photovoltaic,Analog Electronics, Digital Electronics, Semiconductor Materials and Devices, Basics of Electronic Engineering, Fundamentals of Electronic Devices, Laser Physics, Control System, Signal and System are mainly interesting subject for the teaching at both UG and PG level.

ACADEMICS CONTRIBUTIONS

  1. Conducted STEAM School on the topic “Solar Cell Device Simulation” at Chitkara University, Punjab.
  2. Conducted Summer School on how to write research papers in semiconductor device and simulations.

M.E. THESIS GUIDANCE

Guiding two (2) M.E. students on solar cell device simulation using open source 1-D simulators.

Ph.D. RESEARCH GUIDANCE

  1. “Silicon PERC solar cells”- Ms. Savita (ongoing)
  2. Arrik Khanna (ongoing)

ACADEMIC EVENTS

  1. Attended “46thIEEE Photovoltaics Specialist Conference (PVSC)” held at the Sheraton Grand, Chicago, IL USA, June 16-21, 2019 and presented three research papers.
  2. Presented research paper in “6thInternational Conference on ‘Microelectronics, Circuits and Systems’, Micro2019” held at Amity University, Kolkata, India, July 6-7, 2019.
  3. Attended Pre-conference workshop Thin Film Solar Cells, 13th November 2017, National Physical Laboratory, Delhi, India.
  4. Attended 17th International Conference on Thin Films 13th -17th November 2017, National Physical Laboratory, Delhi, India.
  5. Attended 10th national conference on Solid State Chemistry and Allied Areas (ISCAS 2017) July 1-3, 2017, organized by Department of Applied Physics Delhi Technological University, in association with Indian Association of Solid-State Chemists and Allied Scientists
  6. Attended one-week workshop on “E-Resources: A Gateway for Research” held from 5th Sept to 9th Sept 2016, organized by central library, Delhi Technological University.
  7. Attended TEQIP-II Sponsored One Week Faculty Development Programme on “Advances in Microelectronics and Plasma Diagnostics” organized by Department of Applied Physics, Delhi Technological University (DTU) from Aug 29th – Sept 02nd, 2016.
  8. Attended one-day national seminar on Frontiers in Applied Science and Technology (FAST-2016), Organized by Department of Applied Physics, Delhi Technological University on March 22, 2016.
  9. Attended “International Day of Yoga” held on 21st June 2016 at Delhi Technological University. Attended “International Day of Yoga” held on 21st June 2015 at Delhi Technological University.
  10. Attended “42nd IEEE Photovoltaics Specialist Conference (PVSC)” held at the Hyatt Regency, New Orleans, Louisiana, USA, June 14-19, 2015 and presented two research papers.
  11. Attended two days National Workshop on Power Electronics (NWPE-2015), 6-7th November 2015. Attended one day “National Seminar on Recent Advances in Physics (NSRAP-2015)” held at Delhi Technological University, Delhi on 16th February 2015
  12. Attended Synopsys University Symposium 2014 on Custom IC Design & Device Modeling Tools and Technologies, Hotel Lalit, New Delhi, March 7, 2014.
  13. Attended “1st International Conference on Microelectronics, Circuits & Systems (Micro-2014)” held at Hyatt Regency, Salt Lake City, Kolkata, West Bengal, India, July 11-13th, 2014, and presented one research paper.
  14. Attended “International Conference on Emerging Trends in Science and Cutting-Edge Technology” held at YMCA, Connaught Place, New Delhi, 28th sept, 2014, and presented one research paper.
  15. Attended “3rd International Conference NANOCON 014 Smart Materials, Composites, Applications and New Invention” held at Le Meridian Pune, 14-15th 2014, organized by Bharati Vidhyapeeth University, and presented one research paper.
  16. Attended a two-day Mini-Colloquia organized by IEEE EDS Delhi Chapter held on March 14-15, 2012 at S.P. Jain Centre Auditorium, University of Delhi, South Campus, New Delhi-110021.
  17. Attended a two days’ workshop on “Wireless and I-Robotics” held from 29thjan-30th Jan at Delhi Technological University organized by Technex’2011 IT-BHU in association with Robosapiens India.
  18. Attended a two days’ workshop “REVOBOT” an autonomous robot at Delhi Technological University organized by Robhatah and EMTECH on 8-9thFeb, 2011
  19. Attended Colloquial on ‘Compact Modelling Techniques for Nanoscale Devices and Circuit analyses, sponsored by IEEE under Distinguished Lectures Program.
  20. Attended two days Science Academics Lecture Workshop on Frontiers in Science & Engineering organized by IAS, INSA, NAS and DEEN DAYAL UPADHYAYA COLLEGE (DU).
  1. Awarded commendable Research award from Delhi Technological University on March 13, 2020.
  2. Received start-up research grant of Rs. 24.3 lacs from DST-SERB on Nov 26, 2019.
  3. Received “Research incentive awards” from Chitkara University, Punjab for the publications of the duration July 2019 – Dec 2019
  4. Received “Research incentive awards” from Chitkara University, Punjab for the publications of the durationJan 2019 – June 2019
  5. Received Partial travel support from CSIR to present research paper in 46th IEEE PVSC conference held in Chicago, IL, USA in June 2019.
  6. Received “Research Publication Excellence Award” from Chitkara University, Punjab on April 2018.
  7. Received certificate of appreciation for serving as the Resource Person and sharing my research expertise to other faculty members on the subject matter during 10 days FDP on State of Art Electronic Circuits/Devices and their Applications, Photonics at Chitkara University, Punjab on July 2018.
  8. Awarded commendable Research award from Delhi Technological University on March 21, 2018.
  9. Awarded international travel support from DST, GoI to present the research paper in international conference held at University of Aveiro, Portugal.
  10. Awarded SRF from UGC from Oct 2015 to Dec 2017.
  11. Awarded JRF from UGC from Oct 2013 to Dec 2015.
  12. UGC–NET-JRF (2013) QUALIFIED (Lectureship)
  13. Awarded international travel support from Delhi Technological University to present the research paper in 42ndIEEE Photovoltaic Specialist Conference (PVSC), New Orleans, LA, USA.
  14. Received a certificate of merit for securing 1st position in the College Examinations of the annual year 2010 and 2011, Deen Dayal Upadhyaya College, University of Delhi.
  15. College topper of the annual year 2008-2011, Deen Dayal Upadhyaya College, University of Delhi.
  16. Received a certificate of merit for making a working model of the robot and securing 2ndposition in zonal rounds of Robo-opus’2011 held from 29th -30th Jan at DTU organized by Technex’2011 IT-BHU in association with Robosapiens India.
  17. Received a certificate of excellence for participating in the final round and securing 1st position in a first round of robo-opus-2011 a national level Robotics Championship organized by technex’2011 IT-BHU in association with Robosapiens India in IT-BHU on 3rd-6th March-2011.
  18. Certificate of merit for securing 1st position in secondary examination 2005.

 

SCIENTIFIC MEMBERSHIP

  • International Solar Energy Society (ISES), Wiesentalstr. 50, 79115 Freiburg, Germany.
  • Institute of Electrical and Electronics Engineers (IEEE).
  • Solar Energy Society of India (SESI).
  • Department of Engineering Physics, Delhi Technological University         Aug 2013 – Apr 2018
  • Ph.D.
  • New Delhi, NCT, India
  • Topic- Design and Simulations of SiC Based Rear Contact Si and SiGe Solar Cells for Standalone and Tandem Applications
  • Department of Electronics Science, University of Delhi    Aug 2011 – Jul 2013
  • Master of Science, Electronics    
  • New Delhi, NCT, India
  • Project- Synthesis, and characterization of thin films and nanoparticles of zinc oxide (ZnO)
  • Training- Summer training at NIKON INDIA for two months. Worked on a project related to Packaging Study
  • Deen Dayal Upadhyaya College, University of Delhi        Aug 2008 – Jul 2011
  • Bachelor of Science, Electronics
  • New Delhi, NCT, India
  • Project- Designed autonomous multitasking robot using ATMEGA8 MCU
  1. From 17th January 2018 to 17th May 2018, worked as an Assistant Professor in ABES Institute of Technology (ABESIT), Ghaziabad, UP.
  2. From October-2015 to December 2017, worked as a Senior Research Fellow (SRF), under UGC-JRF Fellowship scheme in Department of Applied Physics, Delhi Technological University, DTU.
  3. From August-2013 to October-2015, worked as Junior Research Fellow (JRF), under UGC-JRF Fellowship scheme in Department of Applied Physics, Delhi Technological University, DTU.
  4. From August 2013 to December 2017 involved with undergraduate theory and lab classes of Digital Electronics, Microprocessor 8086, PFGA, Mobile, Satellite, Analog and Digital Communication as a Research Assistant in Department of Applied Physics, Delhi Technological University.