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Dr Jaya Madan
Assistant Professor

jaya.madan@chitkara.edu.in

Expert Areas : Semiconductor Devices, Transistors, Device Modelling, TCAD Device Simulation, Solar Cell

Dr. Jaya Madan is currently an Assistant Professor (Research) at Chitkara University Research and Innovation Network (CURIN) Department of Chitkara University, Punjab, India. She received her B.Sc. (H) and M.Sc. degrees in Electronics from the University of Delhi, India, in 2011 and 2013 respectively. She received her doctorate (PhD) degree under the UGC (Government of India) JRF and SRF scheme in March 2018, from Applied Physics Department, Microelectronics Research Laboratory, Delhi Technological University (DTU) (Formerly Delhi College of Engineering), New Delhi, India. She has authored/co-authored 96 research articles published in various international journal (SCI-indexed), and international conferences of repute. She has also contributed to 02 springer book chapters. She is also the reviewer of many peer reviewed journals. Her current area of research covers the analytical modeling, designing and simulation of semiconductor devices such as field effect transistors, and solar cells.

  • Research
  • Teaching
  • Awards
  • Patents
  • Education
  • Service

Researcher IDs:

Field of Specialization:

  1. Semiconductor Device Modeling, Simulation and Nanoelectronics.
  2. Expertise in TCAD designing of CMOS devices such as Tunnel FET, MOSFETs, junctionless FETs, HEMT for high performance analog and RF applications.
  3. Skilled in ATLAS SILVACO TCAD for designing Nano scale devices.
  4. Expertise in SCAPS, and AFORS-HET based solar cell device simulators.

Research Publications:

845-Citations, h-index-16, i-10-index-21

  • Paper published in Journals and conferences:
  • Total Publications:96
    • 47               Papers in International Refereed Journals
    • 46               Papers in International Conferences
    • 02               Book Chapter
    • 01               National Conference

Year Wise Summary of Papers Published in Journals and Conferences

Year International Journal International Conferences National Conferences Book Chapter Total
2015 01 05 — — 06
2016 03 01 — — 04
2017 04 04 01 01 10
2018 02 09 — — 11
2019 02 04 — — 06
2020 14 08 — 01 23
2021  13 10 — — 23
2022 (till May) 08 06 — — 14
Total 47 47 01 02 97

 

Chapter’s contributed in Books (2)

  1. R. Pandey, J. Madan, R. Sharma, M. Dassi, and R. Chaujar, “Built-in Reliability Investigation of Gate-Drain Underlapped PNIN-GAA-TFET for Improved Linearity and Reduced Intermodulation Distortion,” in Energy Systems, Drives and Automations: Proceedings of ESDA 2019, Springer, pp. 205-214.
  2. J. Madan and R. Chaujar, “Effect of Nanoscale Structure on Reliability of Nano Devices and Sensors,” in Outlook and Challenges of Nano Devices, Sensors, and MEMS, T. Li and Z. Liu, Eds., ed Cham: Springer International Publishing, 2017, pp. 239-270.

Articles in International Refereed Journals (47) 

*Corresponding author

  1. S. Kashyap, *J. Madan, and R. Pandey, “Design and Parametric Optimization of Ion Implanted PERC Solar Cells to Achieve 22.8% Efficiency: A Process and Device Simulation Study,” Sustainable Energy and Fuels, RSC 2022. (I.F.-6.367). DOI: 10.1039/D2SE00434H, Visit: https://pubs.rsc.org/en/content/articlelanding/2022/se/d2se00434h
  2. K. Tamersit, J. Madan, A. Kouzou, R. Pandey, R. Kennel, M. Ab-delrahem, “Role of Junctionless-mode in Improving the Photosensitivity of Sub-10 nm Carbon Nanotube/Nanoribbon Field-Effect Photo-transistors: Quantum Simulation, Performance Assessment, and Comparison,” Nanomaterials, MDPI, vol. 12(10), p. 1639 (16pp), 2022. (I.F.-5.076). DOI: https://doi.org/10.3390/nano12101639, Visit: https://www.mdpi.com/2079-4991/12/10/1639
  3. S. Kashyap, *J. Madan, R. Pandey, and J. Ramanujam, “22.8% Efficient Ion Implanted PERC Solar Cell with a Roadmap to Achieve 23.5% Efficiency: A Process and Device Simulation Study,” Optical Materials, Elsevier, vol. 128, p. 112399, 2022. (I.F.-3.08). DOI: https://doi.org/10.1016/j.optmat.2022.112399, Visit: https://www.sciencedirect.com/science/article/pii/S0925346722004335
  4. S. Bhattarai, R. Pandey, J. Madan, A. Mhamdi, A. Bouazizi, D. Muchahary, A. Sharma, D. Gogoi, T. D. Das, “Investigation of Carrier Transport Materials for Performance Assessment of Lead Free Perovskite Solar Cells,” IEEE Transactions on Electron Devices, vol. 69, Issue 6, pp. 3217-3224, 2022. (I.F.-2.917), DOI: 10.1109/TED.2022.3165516, Visit: https://ieeexplore.ieee.org/document/9759514
  5. R. Gautam, *J. Madan and R. Pandey, “Optimization of Inversion mode and Junctionless Nanowire MOSFET for Improved Sensitivity to Process Induced Variability,” Applied Nanoscience, Springer, vol. , p. , 2022. (I.F.- 3.674 ). DOI: https://doi.org/10.1007/s13204-022-02480-z
  6. J. Madan*, A. Khanna, P.K. Gumber Bedi, R. Gautam, R. Pandey, “Numerical Simulations of PbS Colloidal Quantum Dots Solar Cell with ZnO: PEIE based Electron Transport Layer,” Indian Journal of Physics, Springer, vol. , p. , 2022. (I.F.-1.947). DOI: https://doi.org/10.1007/s12648-022-02354-8
  7. S. Kashyap, R. Pandey, *J. Madan, and R. Sharma, “Design and simulations of 24.7% efficient silicide on oxide-based electrostatically doped (SILO-ED) carrier selective contact-based PERC solar cell,” Superlattices and Microstructures, Elsevier, vol. , p. , 2022. (I.F.-2.658). DOI: https://doi.org/10.1016/j.micrna.2022.207200
  8. M. Dassi, *J. Madan, R. Pandey, and R. Sharma, “Mg2Si/Si heterojunction dopingless TFET with reduced random dopant fluctuations for low power applications,” Journal of Materials Science: Materials in Electronics, vol. 33, p. 6816–6828, 2022. (I.F.-2.478), DOI: 10.1007/s10854-022-07860-3
  9. M. Dassi, *J. Madan, R. Pandey, and R. Sharma, “Chemical modulation of conducting polymer gate electrode work function based double gate Mg2Si TFET for gas sensing applications,” Journal of Materials Science: Materials in Electronics, vol., p., 2021. (I.F.-2.478), DOI: 10.1007/s10854-021-07597-5
  10. S. Kashyap, R. Pandey, *J. Madan, and R. Sharma, “Process and device simulations aimed at improving the emitter region performance of silicon PERC solar cells,” Journal of Micromechanics and Microengineering, IOP, vol. 32, p. 025001 (13pp), 2021. (I.F.- 1.881). DOI: https://doi.org/10.1088/1361-6439/ac404b
  11. P. Goyal, J. Madan*, G. Srivastava, R. Pandey, and R.S. Gupta, “Performance analysis of drain pocket hetero gate dielectric DG-TFET: Solution for ambipolar conduction and enhanced drive current,” Silicon, Springer, vol. , Issue , p. , 2021. (I.F.-2.67). DOI: 10.1007/s12633-021-01564-9
  12. P. Sharma, *J. Madan, R. Pandey, and R. Sharma, “Reliability Analysis of Cost-Efficient CH3NH3PbI3 based Dopingless Tunnel FET,” Semiconductor Science and Technology, IOP, vol. 37, Issue 1, pp. 015011, 2021. (I.F.-2.352). DOI: https://doi.org/10.1088/1361-6641/ac38bb, Visit: https://iopscience.iop.org/article/10.1088/1361-6641/ac38bb
  13. N. Shrivastav, *J. Madan, R. Pandey and A.E. Shalon, “Investigations Aimed at Producing 33% Efficient Perovskite-Silicon Tandem Solar Cell Through Device Simulations,” RSC Advances, vol. 11, p. 37366-37374, 2021. (I.F.- 3.390). DOI: 10.1039/d1ra06250f
  14. R. Pandey, S. Sharma, *J. Madan and R. Sharma, “Numerical Simulations of 22% Efficient All-Perovskite Tandem Solar Cell Utilizing Lead-Free and Low Lead Content Halide Perovskites,” Journal of Micromechanics and Microengineering, IOP, vol. 32, p. 014004, 2021. (I.F.- 1.881). Visit: https://iopscience.iop.org/article/10.1088/1361-6439/ac34a0
  15. A. Khanna, R. Pandey, *J. Madan and A. Dhingra, “Comprehensive Device Simulation of 16.9% Efficient Two-terminal PbS-PbS CQD Tandem Solar Cell,” Optical Materials, Elsevier, vol., 122 p. 111677(1-9), 2021. (I.F.-3.08). DOI: https://doi.org/10.1016/j.optmat.2021.111677, Visit: https://www.sciencedirect.com/science/article/pii/ S0925346721008776
  16. J. Madan, K. Singh, and R. Pandey, “Comprehensive device simulation of 23.36% efficient two-terminal perovskite-PbS CQD tandem solar cell for low-cost applications,” Scientific Reports, Nature, vol. 11, p. 19829, 2021. (I.F.-5.133), DOI: https://www.nature.com/articles/s41598-021-99098-y
  17. M. Dassi, *J. Madan, R. Pandey, and R. Sharma, “Impact of Interfacial Charges on Analog and RF Performance of Mg2Si Source Heterojunction Double Gate Tunnel Field Effect Transistor,” Journal of Materials Science: Materials in Electronics, vol. 32, p. 23863–23879, 2021. (I.F.-2.478), DOI: https://doi.org/10.1007/s10854-021-06823-4
  18. S. Gohri, J. Madan, R. Pandey, and R. Sharma, “Performance Analysis for SnS and Sn2S3 based Back Surface Field CZTSSe Solar Cell: A Simulation Study,” Journal of Electronic Materials, Springer vol. 50, p. 6318-6328, 2021. (I.F.-1.938). DOI: https://doi.org/10.1007/s11664-021-09152-8
  19. K. Sharma, A. Pathania, R. Pandey, *J. Madan and R. Sharma, “Process voltage temperature analysis of MOS based balanced pseudo-resistors for biomedical analog circuit a pplications,” Circuit World, Emerald, vol. 47, p., 2021. (I.F.-0.875). DOI: 10.1108/CW-08-2020-0213, Visit: https://doi.org/10.1108/CW-08-2020-0213
  20. P. Sharma, *J. Madan, R. Pandey, and R. Sharma, ” Numerical Simulations of a Novel CH3NH3PbI3 based Double-Gate Dopingless Tunnel FET,” Semiconductor Science and Technology, IOP, vol. 36, Issue 5, pp. 055008 (10pp), 2021. (I.F.-2.352). DOI: https://doi.org/10.1088/1361-6641/abec13, Visit: https://iopscience.iop.org/article/10.1088/1361-6641/abec13
  21. R. Pandey, *J. Madan and R. Sharma, “Enhanced Charge Extraction in ‘Metal-Perovskite-Metal Back-Contact’ Solar Cell Structure Through Electrostatic Doping: A Numerical Study,” IEEE Transactions on Electron Devices, vol. 68, Issue 4, pp. 1757 – 1763, 2021. (I.F.-2.917). DOI: 10.1109/TED.2021.3057029, Visit: https://ieeexplore.ieee.org/document/9359360
  22. S. Sharma, R. Pandey, J. Madan* and R. Sharma, “Numerical simulations and proof of concept for performance assessment of cesium based lead-free wide-bandgap halide solar cells,” Optical Materials, Elsevier, vol. 111, p. 110644, 2020. (I.F.-3.08). DOI: https://doi.org/10.1016/j.optmat.2020.110644, Visit: https://www.sciencedirect.com/science/article/abs/pii/S0925346720309848
  23. P. Sharma, J. Madan, R. Pandey, and R. Sharma, “RF analysis of double gate junctionless Tunnel FET for wireless communication systems: A Non-Quasi Static Approach,” Journal of Electronic Materials, Springer, vol. 50, p. 138-154, 2021. (I.F.-1.938)., Visit: https://link.springer.com/article/10.1007/s11664-020-08538-4
  24. K. Sharma, A. Pathania, R. Pandey, *J. Madan and R. Sharma, “MOS based pseudo-resistors exhibiting Tera Ohms of Incremental Resistance for biomedical applications: Analysis and proof of concept,” Integration, the VLSI Journal, Elsevier, vol. 76, p. 25-39, 2021. (I.F.-1.214). DOI: https://doi.org/10.1016/j.vlsi.2020.08.001 , Visit: https://www.sciencedirect.com/science/article/abs/pii/S0167926020302625
  25. S. Kashyap, R. Pandey, *J. Madan, and R. Sharma, “Design and Simulation of a-Si:H/PbS Colloidal Quantum Dots Monolithic Tandem Solar Cell for 12% Efficiency,” Physica Status Solidi (a) Applications and Materials Science, Wiley, vol. 217, Issue 20, p. 2000252 (13pp), 2020. (I.F.-1.759). DOI: https://doi.org/10.1002/pssa.202000252, Visit: https://onlinelibrary.wiley.com/doi/10.1002/pssa.202000252
  26. M. Dassi, *J. Madan, R. Pandey, and R. Sharma, “A novel source material-engineered double gate tunnel field effect transistor for radio frequency integrated circuit applications,” Semiconductor Science and Technology, IOP, , vol. 35, Issue 10, p. 105013 (12pp), 2020. (I.F.-2.361).  https://doi.org/10.1088/1361-6641/abaa5b
  27. A. Pathania, R. Pandey, *J. Madan, and R. Sharma, “Design and Optimization of 26.3% Efficient Perovskite/FeSi2 Monolithic Tandem Solar Cell,” Journal of Materials Science: Materials in Electronics, vol. 31, Issue 18, p. 15218-15224, 2020. (I.F.-2.220). DOI: 10.1007/s10854-020-04086-z, Visit: https://doi.org/10.1007/s10854-020-04086-z
  28. A. Pathania, *J. Madan, R. Pandey, and R. Sharma, “Effect of structural and temperature variations on perovskite/Mg2Si based monolithic tandem solar cell structure,” Applied Physics A, Springer, vol. 126, p. 580, 2020/07/02 2020. (I.F.- 1.810). Visit: https://doi.org/10.1007/s00339-020-03758-1
  29. R. Pandey, A. Khanna, K. Singh, S. K. Patel, H. Singh, and *J. Madan, “Device simulations: Toward the design of >13% efficient PbS colloidal quantum dot solar cell,” Solar Energy, Elsevier, vol. 207, pp. 893-902, 2020/09/01/ 2020. Visit: https://doi.org/10.1016/j.solener.2020.06.099 (I.F.-4.608).
  30. J. Madan, R. Pandey, R. Sharma, and R. Chaujar, “Investigation of electrical/analog performance and reliability of gate metal and source pocket engineered DG-TFET,” Microsystem Technologies, Springer, April 2020. (I.F.-1.737). DOI: https://doi.org/10.1007/s00542-020-04845-2, Visit: https://link.springer.com/article/10.1007/s00542-020-04845-2
  31. P. Sharma, K. Sharma, H.S. Jatana, *J. Madan, R. Pandey, and R. Sharma, “A 1.1 mW biopotential amplifier based on bulk-driven quasi-floating gate technique with extremely low-value of offset voltage,”Analog Integrated Circuits and Signal Processing, Springer, vol. 103, p. 303-313, 2020. (I.F.-0.925). DOI: https://doi.org/10.1007/s10470-020-01623-y , Visit:https://link.springer.com/article/10.1007%2Fs10470-020-01623-y
  32. J. Madan, M. Dassi, R. Pandey, R. Chaujar and R. Sharma, “Numerical Analysis of Mg2Si/Si Heterojunction DG-TFET for low power/high performance applications: Impact of Non- Idealities,” Superlattices Microstructures, Elsevier, vol. 139, p. 106397, 2020. (I.F.-2.120). Visit: https://www.sciencedirect.com/science/article/pii/S0749603619318774
  33. J. Madan, R. Pandey and R. Chaujar, “Conducting Polymer based Gas Sensor using PNIN- Gate All Around – Tunnel FET,” Silicon, Springer, vol. 12, Issue 12, p. 2947-2955, 2020. (I.F.-1.499). Visit:https://link.springer.com/article/10.1007/s12633-020-00394-5
  34. J. Madan, Shivani, R. Pandey, R. Sharma, “Device simulation of 17.3% efficient lead-free all-perovskite tandem solar cell,” Solar Energy, Elsevier, vol. 197, p. 212-221, 2020. (I.F.-4.608). Visit:https://www.sciencedirect.com/science/article/pii/S0038092X20300062
  35. J. Madan, S. Garg, K. Gupta, S. Rana, A. Manocha, and R. Pandey, “Numerical simulation of charge transport layer free perovskite solar cell using metal work function shifted contacts,” Optik, Elsevier, vol. 202, p.163646, 2020. (I.F.-2.187). Visit:https://www.sciencedirect.com/science/article/pii/S003040261931544X
  36. J. Madan, R. Pandey, R. Sharma, and R. Chaujar, “Impact of metal silicide source electrode on polarity gate induced source in junctionless TFET,” Applied Physics A, Springer, vol. 125:600, August 08 2019. (I.F.- 1.810), Visit:https://link.springer.com/article/10.1007/s00339-019-2900-6
  37. R. Pandey, A. Singla, *J. Madan, R. Sharma, and R. Chaujar, “Toward the design of monolithic 23.1% efficient hysteresis and moisture free perovskite/c-Si HJ tandem solar cell: A numerical simulation study,” Journal of Micromechanics and Microengineering, IOP, vol. 29, p. 064001 (9pp), 2019. (I.F.- 1.739). Visit:https://iopscience.iop.org/article/10.1088/1361-6439/ab1512/meta
  38. S. Shekhar, J. Madan, and R. Chaujar, “Source/Gate Material-Engineered Double Gate TFET for improved RF and linearity performance: a numerical simulation,” Applied Physics A, Springer, vol. 124, p. 739, 2018. (I.F.- 1.810). Visit: https://link.springer.com/article/10.1007/s00339-018-2158-4
  39. J. Madan and R. Chaujar, “Temperature Associated Reliability Issues of Heterogeneous Gate Dielectric – Gate All Around – Tunnel FET,” IEEE Transactions on Nanotechnology, vol. 17, no. 1, pp. 41-48, 2018, DOI: 10.1109/TNANO.2017.2650209. (I.F.-2.196). Visit: https://ieeexplore.ieee.org/abstract/document/7811198
  40. J. Madan and R. Chaujar, “Numerical Simulation of N+ Source Pocket PIN-GAA-Tunnel FET: Impact of Interface Trap Charges and Temperature,” IEEE Transactions on Electron Devices, vol. 64, pp. 1482-1488, 2017. (I.F.-2.913). Visit: https://ieeexplore.ieee.org/abstract/document/7873327
  41. J. Madan and R. Chaujar, “Gate Drain Underlapped-PNIN-GAA-TFET for Comprehensively Upgraded Analog/RF Performance,” Superlattices and Microstructures, Elsevier, vol. 102, pp. 17-26, Feb. 2017. (I.F.-2.120). Visit: https://www.sciencedirect.com/science/article/pii/S0749603616314963
  42. J. Madan, R.S. Gupta, and R. Chaujar, “Mathematical modeling insight of hetero gate dielectric-dual material gate-GAA-tunnel FET for VLSI/analog applications,” Microsystem Technologies, Springer, vol. 23, pp. 4091- 4098, September 01 2017. (I.F.-1.737). Visit: https://link.springer.com/article/10.1007/s00542-016-2872-9
  43. J. Madan, R.S. Gupta, and R. Chaujar, “Performance investigation of heterogeneous gate dielectric-gate metal engineered–gate all around-tunnel FET for RF applications,” Microsystem Technologies, Springer, vol. 23, pp. 4081-4090, September 01 2017. (I.F.-1.737). Visit:https://link.springer.com/article/10.1007/s00542-016-3143-5
  44. J. Madan and R. Chaujar, “Interfacial Charge Analysis of Heterogeneous Gate Dielectric-Gate All Around-Tunnel FET for Improved Device Reliability,” IEEE Transactions on Device and Materials Reliability, vol. 16, pp. 227-234, 2016. (I.F.-1.407). Visit: https://ieeexplore.ieee.org/abstract/document/7466102
  45. J. Madan and R. Chaujar, “Palladium gate all around-Hetero dielectric-tunnel FET based highly sensitive hydrogen gas sensor,” Superlattices and Microstructures, Elsevier, vol. 100, pp. 401-408, 2016. DOI: http://dx.doi.org/10.1016/j.spmi.2016.09.050. (I.F.-2.120). DOI: http://dx.doi.org/10.1016/j.spmi.2016.09.050.  Visit:https://www.sciencedirect.com/science/article/pii/S0749603616305262
  46. J. Madan and R. Chaujar, “Gate drain-overlapped-asymmetric gate dielectric-GAA-TFET: a solution for suppressed ambipolarity and enhanced ON state behavior,” Applied Physics A, Springer, vol. 122, p. 973, 2016. (I.F.- 1.810). Visit:https://link.springer.com/article/10.1007/s00339-016-0510-0
  47. J. Madan, R. S. Gupta, and R. Chaujar, “Analytical drain current formulation for gate dielectric engineered dual material gate-gate all around-tunneling field effect transistor,” Japanese Journal of Applied Physics, IOP, vol. 54, p. 094202, 2015. (I.F.-1.376). Visit:https://iopscience.iop.org/article/10.7567/JJAP.54.094202/meta

Articles in International Conferences (47)

  1. P. Goyal, G. Srivastava, J. Madan, R.S. Gupta, “Performance Investigation of Hetero Gate Dielectric DGTFET with Drain Pocket for Analog/RF Applications,” WECON 2022 (Accepted and presented).
  2. S. Kashyap, R. Pandey, J. Madan*, and R. Sharma, “Impact of Metal Silicides on the Performance of Electrostatically Doped based Double-POLO PERC Solar Cell,” In 2022 49th IEEE Photovoltaic Specialists Conference (PVSC), 2022. (Accepted and presented).
  3. Savita Kashyap, Rahul Pandey, Jaya Madan, Rajnish Sharma, “Silicide on Oxide based Carrier Selective Front Contact for 24% Efficient PERC Solar Cell” IEEE VLSI DCS 2022: 3rd IEEE Conference on VLSI Device, Circuit and System. (Accepted and presented).
  4. Shrivastav, S. Kashyap, R. Pandey*, J. Madan*, “Investigating the CIGS Solar Cell to Achieve 16.5% Conversion Efficiency through Device Simulations”, ECS Transactions, IOP, vol. 107(1), pp. 8871-8876, 2022. DOI:- https://doi.org/10.1149/10701.8871ecst
  5. Savita Kashyap, Nikhil Shrivastav, Rahul Pandey, Jaya Madan and Rajnish Sharma, “Double POLO Carrier Selective Contact Based PERC Solar Cell for 25.5% Conversion Efficiency: A Simulation Study”, ECS Transactions, IOP, 107(1), pp. 6365-6370, 2022. DOI:- https://doi.org/10.1149/10701.6365ecst
  6. Preeti Goyal, Garima Srivastava, Jaya Madan, Rahul Pandey, and R.S. Gupta, “Source Material-Engineered Charge Plasma based Double Gate TFET for Analog/RF Applications”, pp.-238-241, 2021 International Conference on Industrial Electronics Research and Applications (ICIERA), 22-24 Dec, 2021, Delhi, India. DOI: 10.1109/ICIERA53202.2021.9726718.
  7. M. Dassi, J. Madan*, R. Pandey and R. Sharma, “Magnesium Silicide Source Double Palladium Metal Gate TFET for Highly Sensitive Hydrogen Gas Sensor”, pp.-238-241, 2021 Devices for Integrated Circuit (DevIC), 19-20 May, 2021, Kalyani, India.
  8. S. Sharma, R. Pandey, J. Madan* and R. Sharma, “Optimization of Mixed Sn and Pb Perovskite Solar Cell in Terms of Transport Layers and Absorber Layer Thickness Variation”, pp.-633-636, 2021 Devices for Integrated Circuit (DevIC), 19-20 May, 2021, Kalyani, India.
  9. P. Sharma, J. Madan*, R. Pandey, R. Sharma, “Impact of Ferroelectric Oxide Layer on Palladium Silicide Source Electrode based Double-Gate Junctionless TFET”, pp.-229-232, 2021 Devices for Integrated Circuit (DevIC), 19-20 May, 2021, Kalyani, India.
  10. S. Kashyap, J. Madan*, R. Pandey and R. Sharma, “Impact of Phosphorus Ion Implantation Dose on the Performance of PERC Solar Cell,” in 2021 48th IEEE Photovoltaic Specialists Conference (PVSC), 2021, pp. 2247-2249, doi: 10.1109/PVSC43889.2021.9518536.
  11. Kashyap, J. Madan*, R. Pandey and R. Sharma, “Silicide Electrode based Electrostatically Doped Back Surface Field in PERC Solar Cell,” In 2021 48th IEEE Photovoltaic Specialists Conference (PVSC), 2021, pp. 2386-2388, doi: 10.1109/PVSC43889.2021.9518812.
  12. Khanna, R. Pandey, J. Madan* and A. Dhingra, “Thickness Optimisation and Defect Analysis of Wide Bandgap PbS-CQD Solar Cell by SCAPS-1D Simulations,” in 2021 48th IEEE Photovoltaic Specialists Conference (PVSC), 2021, pp. 2191-2193, doi: 10.1109/PVSC43889.2021.9518721.
  13. S. Gohri, J. Madan*, R. Pandey, R. Sharma, “Assessment of WSe2 based BSF layer on CZTSSe solar cell using SCAPS-1D,” in 2021 48th IEEE Photovoltaic Specialists Conference (PVSC), 2021. (ACCEPTED).
  14. S. Sharma, J. Madan*, R. Pandey, R. Sharma, “Design and Optimization of Low Lead Content-Based Mixed Sn and Pb Perovskite Solar Cell for 19.46% Efficiency”, in 2021 48th IEEE Photovoltaic Specialists Conference (PVSC), 2021. (ACCEPTED).
  15. A. Khanna, R. Pandey, J. Madan*, A. Dhingra, “Numerical Simulation and Optimisation of Wide Bandgap (1.45eV) PbS-CQD Solar Cell for 14% Conversion Efficiency”, in 2021 48th IEEE Photovoltaic Specialists Conference (PVSC), 2021. (ACCEPTED).
  16. P. Sharma, J. Madan*, R. Pandey, R. Sharma, “A Methodical Survey on Present State of Art for Electrostatically-Doped Tunnel FETs and its Future Prospects”, Materials Today: Proceedings, Elsevier, vol. 45(6), pp. 5381-5386, 2021. Proceedings of 2nd International Conference on Aspects of Materials Science and Engineering (ICAMSE2021), 05-06th March, 2021, Panjab University, Chandigarh, India. DOI:- https://doi.org/10.1016/j.matpr.2021.01.963
  17. K. Sharma, R. K. Tripathi, H. S. Jatana, R. Pandey, J. Madan, P. Sharma, R. Sharma, “Current reference circuit operable at low voltages using composite MOS triode resistor”, 2020 IEEE VLSI Device, Circuit and Systems conference (VLSI-DCS), pp.-313-316, 18-19 July, 2020, Kolkata, India.
  18. P. Sharma, K. Sharma, J. Madan, R. Pandey, H. S. Jatana, R. Sharma, “A low-power gm-C filter for neural signal conditioning”, 2020 IEEE VLSI Device, Circuit and Systems conference (VLSI-DCS), pp.-309-312, 18 -19 July, 2020, Kolkata, India.
  19. S. Kashyap, J. Madan*, R. Pandey and R. Sharma, “Comprehensive Study on the Recent Development of PERC Solar Cell,” in 2020 47th IEEE Photovoltaic Specialists Conference (PVSC), 2020, pp. 2542-2546.
  20. S. Sharma, S. Gohri, R. Pandey, J. Madan* and R. Sharma, “Device Simulation of Poly (3-hexylthiophene) HTL Based Single and Double Halide Perovskite Solar Cells,” in 2020 47th IEEE Photovoltaic Specialists Conference (PVSC), 2020, pp. 2327-2330.
  21. S. Gohri, S. Sharma, R. Pandey, J. Madan* and R. Sharma, “Influence of SnS and Sn2S3 based BSF layers on the performance of CZTSSe solar cell,” in 2020 47th IEEE Photovoltaic Specialists Conference (PVSC), 2020, pp. 2300-2303.
  22. A. Pathania, R. Pandey, J. Madan* and R. Sharma, “Performance evaluation of lead-free perovskite solar cell with different Hole/Electron transport materials,” in 2020 47th IEEE Photovoltaic Specialists Conference (PVSC), 2020, pp. 2288-2291.
  23. P. Sharma, J. Madan, S. Mann, A. Mantri, and R. Sharma, “Studies on the Outcome and Relevance of Research in Artificial Intelligence Domain in South Asian Subcontinent”, in Procedia Computer Science, volume 172, pp. 616-622, 2020.
  24. M. Dassi, J. Madan*, R. Pandey and R. Sharma, “Effect of temperature on analog performance of Mg2Si source heterojunction double gate tunnel field effect transistor”, Materials Today: Proceedings, Elsevier, vol. 28(3), pp. 1520-1524, 2020. Proceedings of International Conference on Aspects of Materials Science and Engineering (ICAMSE 2020), 29-30th May, 2020, Panjab University, Chandigarh, India. DOI: https://doi.org/10.1016/j.matpr.2020.04.834
  25. R. Pandey, J. Madan, R. Sharma, and R. Chaujar, “Numerical Simulations to Understand the Role of DIO Additive in PTB7: PC 71 BM Solar Cell,” in 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC), 2019, pp. 0484-0486.
  26. Shivani, J. Madan*, R. Pandey, and R. Sharma, “Designing of CZTSSe Based SnS Thin Film Solar Cell for Improved Conversion Efficiency: A Simulation Study with SCAPS,” in 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC), 2019, pp. 0193-0195.
  27. A. Pathania, R. Pandey, J. Madan, and R. Sharma, “Design and Simulation of Novel Perovskite/Mg 2 Si Based Monolithic Tandem Solar Cell With 25.5% Conversion Efficiency,” in 2019 IEEE 46th Photovoltaic Specialists Conference (PVSC), 2019, pp. 1049-1051.
  28. C. P. Singh, A. Pathania, K. Sharma, J. Madan, R. Sharma, “Design of an Integrator-Differentiator Block for a Transimpedance Amplifier Using 0.18µm Technology”, pp.-394-397, 2019 Devices for Integrated Circuit (DevIC), 23-24 March, 2019, Kalyani, India
  29. J. Madan, H. Arora, R. Pandey and R. Chaujar, “Analysis of Varied Dielectrics as Surface Passivation on AlGaN/GaN HEMT for Analog Applications”, International Conference on Wireless Networks & Embedded Systems (WECON-2018), pp. 15-18, 16-17, November 2018, Chitkara University, Punjab, India. 978-1-5386- 7050-7/18/$31.00 ©2018 IEEE. (Best Paper Award)
  30. R. Kaur, J. Madan*, R. Sharma, R. Pandey and R. Chaujar, “Capacitive Analysis of Hetero Material Gate PNIN-DG-TFET over Diverge Temperature Range for Superior RF/Microwave Performance”, The 2018 IEEE Electron Device Kolkata Conference (2018 IEEE EDKCON), pp.-252-257, 24-25, November 2018, at Kolkata, India.
  31. A. Singla, R. Pandey, R. Sharma, J. Madan, K. Singh, V. K. Yadav and R. Chaujar, “Numerical Simulation of CeOx ETL based Perovskite Solar Cell: – An optimization study for high efficiency and stability”, The 2018 IEEE Electron Device Kolkata Conference (2018 IEEE EDKCON), pp.-278-282, 24-25, November 2018, at Kolkata, India.
  32. J. Madan*, R. Kaur, R. Sharma, R. Pandey and R. Chaujar, “Electrical Characteristics Assessment of Gate Metal and Source Pocket Engineered DG-TFET for low Power Analog Applications”, The 2018 IEEE Electron Device Kolkata Conference (2018 IEEE EDKCON), pp.-358-362, 24-25, November 2018, at Kolkata, India.
  33. N. Arora, R. Pandey, R. Sharma, J. Madan and R. Chaujar, “Parametric Variation of ZnSe/TiO2 Electron Transport Layer Based Perovskite Solar Cell: A Simulation Study and Optimization”, The 2018 IEEE Electron Device Kolkata Conference (2018 IEEE EDKCON), pp.-428-432, 24-25, November 2018, at Kolkata, India.
  34. H. Arora, J. Madan, and R. Chaujar, “Impact On Analog And Linearity Performance Of Nanoscale AlGaN/GaN HEMT With Variation In Surface Passivation Stack,” Materials Today: Proceedings, Elsevier, vol. 5, pp. 17464-17471, 2018.
  35. J. Madan, R. Pandey, and R. Chaujar, “Gate Drain Underlapping: A Performance Enhancer For HD-GAA-TFET,” Materials Today: Proceedings, Elsevier, vol. 5, pp. 17453-17463, 2018.
  36. J. Madan, K. Karwal, and R. Chaujar, “Performance Analysis of Heterojunction DMDG-TFET with Different Source Materials for Analog Application”, pp.-1474-1478, International Conference on Trends in Electronics and Informatics (ICOEI 2018), 11-12, May 2018 at Tirunelveli, India.
  37. J. Madan, S.S. Bisht, and R. Chaujar, “Heterojunction DG-TFET –Analysis of Different Source Material for Improved Intermodulation”, pp.-1080-1084, International Conference on Trends in Electronics and Informatics (ICOEI 2018), 11-12, May 2018 at Tirunelveli, India.
  38. J. Madan, S. Shekhar and R. Chaujar, “Gate Metal Engineered Heterojunction DG-TFETs for Superior Analog Performance and Enhanced Device Reliability”, in Conference on Information and Communication Technology CICT-2017, IIITM Gwalior, India, November 3-5, 2017, pp-1-4, DOI-10.1109/INFOCOMTECH.2017.8340634, Electronic ISBN: 978-1-5386-1866-0.
  39. J. Madan, S. Shekhar, and R. Chaujar, “PNIN-GAA-tunnel FET with palladium catalytic metal gate as a highly sensitive hydrogen gas sensor,” in Simulation of Semiconductor Processes and Devices (SISPAD), 2017 International Conference on, 2017, pp. 197-200.
  40. J. Madan, S. Shekhar and R. Chaujar, “Source Material Assessment of Heterojunction DG-TFET for Improved Analog Performance”, in International Conference on Microelectronics Devices, Circuits and Systems (ICMDCS 2017), VIT University, Vellore India, 10-12th August 2017.
  41. J. Madan and R. Chaujar, “Influence of Temperature Variations on Radio Frequency Performance of PNIN Gate All Around Tunnel-FET”, in International Conference on 2nd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT – 2017), pp. 1110-1114, Bengaluru, India, 19-20 May 2017, DOI: 978-1-5090-3704-9.
  42. J. Madan and R. Chaujar, “Temperature associated reliability issues of heterogeneous gate dielectric-gate all around-tunnel FET,” in Nanoelectronics Conference (INEC), 2016 IEEE International, Chengdu, China, 9-11 May, 2016, pp. 1-2, DOI: 10.1109/INEC.2016.7589278.
  43. J. Madan, R.S. Gupta and R. Chaujar, “Impact of Heterogeneous Gate Dielectric and Gate Metal Engineering on Analog and RF Performance of GAA TFET,” in 18th International Workshop on Physics of semiconductor devices, (IWPSD-2015), 7-10th December, 2015.
  44. J. Madan, R.S Gupta, R. Chaujar. “Capacitive Analysis of Heterogeneous Gate Dielectric-Gate Metal Engineered–Gate All Around-Tunnel FET for RF Applications,” in 2nd International conference on Microelectronics, circuits and systems, Micro-2015, Vol. 1, pp.6-10, Kolkata, 11-12th July, 2015, ISBN-81-85824-46-0.
  45. J. Madan, R.S Gupta, R. Chaujar. “Drain current Analysis of Hetero Gate Dielectric-Dual Material Gate–GAA-Tunnel FET,” in 2nd International conference on Microelectronics, circuits and systems, Micro-2015, Vol. 2, pp.57-61, Kolkata, 11-12th July, 2015, ISBN-81-85824-46-0.
  46. J. Madan, R.S Gupta, R. Chaujar, “TCAD Analysis of Small Signal Parameters and RF Performance of Heterogeneous Gate Dielectric-Gate All Around Tunnel FET,” Tech Connect World Innovation Conference and Expo, Chapter 6, “Nanoelectronics, Materials and Devices”, pp.189-192, June 14-17, 2015, Gaylord National Resort and Convention Center, National Harbor, Maryland, just outside of Washington, D.C., U.S.A.
  47. J. Madan, R.S Gupta, R. Chaujar, “Threshold voltage model of a Hetero Gate Dielectric Dual Material Gate GAA Tunnel FET,” Tech Connect World Innovation Conference and Expo, Chapter 7, “Modeling and Simulation of Microsystems”, pp.254-257, June 14-17, 2015, Gaylord National Resort and Convention Center, National Harbor, Maryland, just outside of Washington, D.C., U.S.A.

Articles in National Conferences (1)

  1. J. Madan and R. Chaujar. “Source Pocket Parameters Assessment of PNIN-GAA-TFET for Improved Analog Performance and High Switching Speed Applications,” in 2nd Second National Conference on Recent Developments in Electronics (NCRDE-2017), Delhi, pp. 77-83, 17th to 18th February, 2017.

Other Research Related Activities

  1. Organised and served as the resource person in an online 03 days’ workshop on “Hands-on training on designing of Tandem solar cell using SCAPS-1D”, from 11th January to 13th January, 2021 at Chitkara University, Punjab, India. Number of registered candidates: – 32.
  2. Organised and served as the resource person in an online “4 Days’ Workshop on Solar Cell Simulation using Open Source TCAD software (SCAPS-1D)”, from 22nd July to 25th July, 2020 at Chitkara University, Punjab, India.
  3. Served as a Resource person in STEAM School, and shared expertise in the workshop for 10 days on solar cell device simulation during January-April 2019, organized by Chitkara university research and innovation network (CURIN), Chitkara university, Punjab.
  4. Member of publication committee of 6th International Conference on Wireless Networks & Embedded Systems WECON 2018 held at Chitkara University during 16th -17th Nov, 2018, Punjab, India.
  5. Served as the Resource Person and shared research expertise to other faculty members on the subject matter during 10 days Faculty Development Program on “State of Art Electronic Circuits/Devices and their Applications, Photonics”, from 25th June 2018 to 6th July 2018, in Chitkara University.
  6. Member of DRC committee at Chitkara University, Punjab.

Overseas research paper presentation

  1. Presented 03 Research papers in “46th IEEE Photovoltaic Specialists Conference (46th PVSC)”, during June 16-21, 2019, at Sheraton grand Chicago, IL, USA. (Sponsored by SERB, DST).
  2. Presented (orally) part of research work in “the INEC-2016 Conference, 7th IEEE International Nanoelectronics Conference” held on 09th -11th May, 2016 at Chengdu, China. Titled “Temperature associated reliability issues of heterogeneous gate dielectric-gate all around-tunnel FET”. Sponsored by Delhi Technological University, Delhi.

Active Reviewer of

  1. IEEE Transactions on Electron
  2. IET Circuits, Devices &
  3. IET, Micro & Nano
  4. Vacuum, Elsevier.
  5. Journal of Computational Electronics, Springer.
  6. Taylor & Francis, International Journal of Modelling and
  7. Journal of Nanoelectronics and Optoelectronics, ASP.
  8. Indian Journal of Physics, Springer.
  9. AEÜ – International Journal of Electronics and Communications, Elsevier.
  10. Results in Physics, Elsevier
  11. Physica E: Low-dimensional Systems and Nanostructures, Elsevier
  12. Semiconductor Science and Technology, IOP
  13. IEEE Access
  14. Pramana Journal of Physics, Indian Academy of Sciences
  15. IEEE 40th International Conference on Electronics and Nanotechnology (ELNANO-2020)
  16. 17th IEEE India Council international conference (INDICON 2020)

Field of Specialisation:

Solid State Physics, Analog Electronics, Digital Electronics, Semiconductor Materials and Devices, Physics of Semiconductor Devices, Basics of Electronics Engineering, Fundamentals of Electronic Devices are mainly interesting subject for the teaching at both UG and PG level.

M.E. Thesis Guidance:

  1. Supervision of awarded M.E. dissertations
    Student name Thesis title Batch
    Shivani

    (M.E. ECE)

    		 Design and analysis of perovskite and CZTSSe based thin film solar cell for standalone and tandem configuration 2018-2021

Ph.D. Students guided/under guidance (Details):

S.No. Name of the student Title of the thesis Year of completion/ registration
1. Minaxi Dassi Numerical simulations and analysis of heterojunction tunnel field effect transistor for low power and high-speed applications Oct-2021
2. Arrik Khanna Design and simulation of pbs colloidal quantum dot solar cell for standalone and tandem configuration Mar-2022
3. Preeti Sharma Design and analysis of electrostatically doped tunnel FET for circuit applications using TCAD simulations Aug-2019
4. Savita Development of advanced high efficiency PERC solar cell through process and device simulations Aug-2019
5. Nikhil Srivastava Tandem solar cell Aug-2020

Academic Events

  1. Attended and presented research work in “46th IEEE Photovoltaics Specialist Conference (PVSC)” held at the Sheraton Grand, Chicago, IL USA, June 16-21, 2019.
  2. Attended and presented research work in “International Conference on Wireless Networks & Embedded Systems (WECON-2018)” held at the Chitkara University, Punjab, India, November 16-17, 2018.
  3. Attended and presented research work in “The 2018 IEEE Electron Device Kolkata Conference (2018 IEEE EDKCON)” held at the Pride Hotel, Kolkata, India, November 24-25, 2018.
  4. Attended and presented research work in “Conference on Information and Communication Technology CICT-2017”, held at IIITM Gwalior, India, November 3-5, 2017.
  5. Attended and presented research work in “2ndIEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT – 2017)”, held at Sri Venkateshwara College of Engineering, Bengaluru, India, May 19-20, 2017.
  6. Attended and presented research work in “IEEE International Nanoelectronics Conference (INEC), 2016”, held at Chengdu, China, May 9-11, 2016.
  7. Attended and presented research work in “18th International Workshop on Physics of semiconductor devices, (IWPSD-2015)”, held at Indian Institute of Science, Bangalore, India, 7-10th December, 2015.
  8. Attended and presented research work in “2nd International conference on Microelectronics, circuits and systems, Micro-2015”, held at Hotel Hyatt Regency in Kolkata, India, 11-12th July, 2015.
  9. Participated in the One Day National Seminar on Frontiers in Applied Science and Technology (FAST-2016) held on 22nd March 2016 at Delhi Technological University.
  10. Participated in the TEQIP-II Sponsored One Week Faculty Development Programme on “Advances in microelectronics and plasma diagnostics” from 29th August to 2nd September 2016, at Delhi Technological University.
  11. Participated in the workshop titled “E-Resources: A Gateway for Research” held from 05th September to 09th September 2016, at Delhi Technological University.
  12. Participated in the Quad copter UAV program held at Delhi Technological University of Robothlon-2015.
  13. Participated in the One Week Faculty Development Program under TEQIP-II on “Recent Advances and Challenges in Power and Energy for Sustainable Growth” held during 01st June to 05th June 2015, at Delhi Technological University.
  14. Participated in the “National Workshop on Power Electronics (NWPE-2015)” held during 06th November to 07th November 2015, at Delhi Technological University.
  15. Participated in the UGC sponsored one day National seminar on Recent Advance in Physics (NSRAP-2015) held at Delhi Technological University on 16th, 2015.
  16. Participated in the workshop titled “Emerging trends in electronics ELECTRAWORK-2009” held from 01st June to 12th June 2009, Acharya Narendra Dev College, Delhi University.
  17. Attended Tutorial on ESD Challenges in Sub-micron Devices: Design, Testing and Application, held on January 19, 2013 as part of First National Conference on Recent Developments in Electronics (NCRDE-2013), organised by IEEE-EDS Delhi Chapter at University of Delhi South Campus, New Delhi.
  18. Attended Second National Workshop on “Einstein and Special Theory of Relativity” held in Deen Dayal Upadhyaya College, University of Delhi, on November 07, 2009.
  19. Participated in the National Workshop on “Fibre Optics and Application” held in SP Jain Centre, University of Delhi South campus on 28th -29th November 2009.
  1. Awarded for excellence in research and innovation in the publication category for “Highest amount of Incentives” earned during the calendar year 2020, on 27th February, 2021, Chitkara University.
  2. Received “Excellence awards Chitkara University 2020” for publishing a research paper with highest H-Index in Chitkara university as first author during the calendar year 2019, on 15th February 2020.
  3. Received “Research Publication Incentive Award” on 27th July, 2019 for excellence in research during January-June 2019, Chitkara University.
  4. Received Financial Assistance by DST SERB under “International travel support (ITS)” scheme to present and attend the international scientific event “46th IEEE Photovoltaic Specialists Conference (PVSC 46) 2019, held at Chicago, USA from 16 June, 2019 to 21 June, 2019.
  5. Received “Teacher’s Excellence Award under Most Committed Category” during excellence awards in April 2019, Chitkara University.
  6. Received “Research Publication Excellence Award” during excellence awards in April 2019, Chitkara University.
  7. Received “Outstanding Ph.D. Thesis Award”, in the VLSI field, in the International Conference on Signal Processing, VLSI and Communication Engineering (ICSPVCE-2019), Delhi Technological University, March 2019.
  8. Awarded prize money and certificate for “Commendable Research Award” for excellence in research, in recognition for the research during the year 2018, DTU.
  9. Received “Best Paper Award” in International Conference on Wireless Networks & Embedded Systems (WECON-2018), 16-17, November 2018, at Chitkara University, Punjab, India.
  10. Awarded Prize Money and Certificate of “Premier Research Award” for excellence in research, in recognition for the research during the year 2017, DTU.
  11. Awarded prize money and certificate for “Commendable Research Award” for excellence in research, in recognition for the research during the year 2017, DTU.
  12. Received Travel Grant by Delhi Technological University for Oral Presentation of part of research work in “7th IEEE International Nanoelectronics Conference-INEC 2016” Chengdu, China.
  13. UGC–NET-JRF (June-2013) QUALIFIED (Lectureship & Fellowship)
  14. Awarded shield and Certificate of Merit for securing 3rd Position in Delhi University, in 3rd Year, B.Sc. (H) Electronics.
  15. Awarded with certificate of Merit for securing 1st position in college in 1st year B.Sc. (Hons.) Electronics, Delhi University, 2009.
  16. Awarded with certificate of Merit for securing 1st position in college in 2nd year B.Sc. (Hons.) Electronics, Delhi University, 2010.
  17. Awarded with certificate of Merit for securing 1st position in college in 3rd year B.Sc. (Hons.) Electronics, Delhi University, 2011.

PATENT GRANTED:

  1. Jaya Madan; Rahul Pandey; and Chanpreet Singh, “Portable lightboard (sets) for online teaching”, Indian Patent Application No: 330797-001, Published: – July 07, 2020, Registration of design: – January 18, 2021.

PATENT FILED:

  1. Rahul Pandey; Darryl Anderson SWAMY; and Jaya Madan, “Printable solar cell”, Patent Application No. 202211009134, Filed on 21/02/2022
  2. Preeti Sharma; Jaya Madan; Rahul Pandey; and Rajnish Sharma, “Diamond-like carbon dielectric based graphene TFET”, Patent Application No. 202111051113, Filed on 08/11/2021
  3. Minaxi Dassi; Jaya Madan; Rahul Pandey; and Rajnish Sharma, “High sensitivity hydrogen gas sensor using palladium receptor”, Patent Application No. 202111047730, Filed on 20/10/2021
  4. Savita Kashyap; Rahul Pandey; Jaya Madan; and Rajnish Sharma, “Two-terminal monolithic tandem solar cell with a-Si:H top subcell and PbS CQD bottom subcell”, Patent Application No. 202111038118, Filed on 23/08/2021.
  5. Savita Kashyap; Rahul Pandey; Jaya Madan; and Rajnish Sharma, “Silicide on oxide-based electrostatically doped (silo-ed) carrier selective contact-based perc photovoltaic device”, Patent Application No. 202111041313, Published on 14/09/2021.
  6. Shivani; Vishal Verma; Divanshu; Bhanu Sharma; Rahul Pandey; Jaya Madan; and Deepika Sharma, “Wearable assistive device for navigation”, Patent Application No. 202111024976, Published 04/06/2021.
  7. Shivani; Jaya Madan; Rahul Pandey; and Rajnish Sharma, “CZTSSe based solar cell with tin sulphide (Sn2S3) back surface field layer”, Patent Application No. 202111023463, Published 26/05/2021.
  8. Madan, J; Pandey, R; and Singh, C, An apparatus for aiding remote teaching, Patent Application No. 202011044570, Published 13/10/2020.
  9. Kashyap, S; Pandey, R; Madan, J; and Sharma, R, “Plasmonic based photo detector”, Patent Application No. 202011043679, Filed on 07/10/2020
  10. Sharma, P; Sharma, R; Madan, J; and Pandey, R, “Two-dimensional perovskite junction-less heterojunction tunnel field effect transistor”, Patent Application No. 202011038743, Filed on 11/09/2020
  11. Pandey, R; and Madan, J, Charge Plasma Perovskite Solar Cell Device, Patent Application No. 202011022005, Filed on 26/05/2020.

PhD: Applied Physics, Delhi Technological University, New Delhi, India, August 2013 to March 2018.

Dissertation Title: Simulation and Analysis of Gate All Around Tunnel FET For High Performance Analog and RF Applications.

M.Sc. : Electronics, University of Delhi, India, June 2013

B.Sc. : Electronics, University of Delhi, India, June 2011

  1. From 17th January 2018 to 17th May 2018, worked as an Assistant Professor in ABES Institute of Technology (ABESIT), Ghaziabad, UP.
  2. From October-2015 to December 2017, worked as a Senior Research Fellow (SRF), under UGC-JRF Fellowship scheme in Department of Applied Physics, Delhi Technological University, DTU.
  3. From August-2013 to October-2015, worked as Junior Research Fellow (JRF), under UGC-JRF Fellowship scheme in Department of Applied Physics, Delhi Technological University, DTU.
  4. From August 2013 to December 2017 involved with undergraduate lab classes of Microprocessor 8086 and analog and digital communication of 1st year and 3rd year students as a Research Assistant in Department of Applied Physics, Delhi Technological University.

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