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Home
About
About Us
Openings at CURIN
Our Faculty
Analytics
Patents
Consultancy
Sponsored Research
International Research Collaborations
Publications
Journals
Conferences
Books/Book Chapters
Doctoral Programs
Approved Supervisors
PhD Awarded
PhD Scholars
Research Collaborations
Research Facilities
Central Instrumentation Facilities
Fabrication Facility
Animal House
Media Laboratory / Studios
Research & Statistical Database
Centres of Excellence
Policies
Recognitions
Research Committee
News & Events
News
Events
Video Gallery
Excellence Awards
Rise Reports
Res Novae
Tech-Connect
CURIN Day
Contact Us
Simulation Analysis of High-k Dielectric Junction less FET for Reduction of Subthreshold Leakage Current
